A 21-dm-OP 1d B 20.3%-Efficiency − 131.8-dBm/Hz-Noise X -Band Cartesian Error Feedback Transmitter With Fully Integrated Power Amplifier in 65-nm CMOS

Abstract

This article presents an X-band Cartesian error feedback loop transmitter (CEFLT) with a fully integrated power amplifier (PA) in a 65-nm CMOS. The extra reference path cancels the feedback signal to mitigate the inherent linearity– noise tradeoff in the conventional Cartesian feedback loop transmitter (CFLT). In this wa y, the nonlinearities from the feedback path are suppressed without using large attenuation, and thus the noise contribution from the feedback path is reduced as well. Compared with the conventional CFLT, the proposed CEFLT can improve the linearity without degrading the noise performance. The PA-included transmitter delivers a maximum power ( P SAT) of 21.4 dBm and output-referred 1-dB compression point ( OP1d B) of 21 dBm, with 33.3% and 30.3% PA output stage efficiency, respectively, and 22.3% and 20.3% system efficiency, respectively. Compared with the open- loop condition, the closed-loop transmitter demonstrates up to 13.6-dB suppression of adjacent channel leakage ratio (ACLR) error vector magnitude (EVM) using 4 Msps 64 quadratic- amplitude modulation (QAM) signals. The out-of-band (OOB) n o i s ea t1 0 0M H zi s−133/−131.8 dBm/Hz for the lower and upper sidebands, respectively.