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JSSC 2020第6期RF & Wireless65nmCharge PumpPLL

A Sub-mW 24-GHz Active-Mixer-Adopted Sub-Sampling PLL Achieving an FoM of -256 d

提出一种采用有源混频器的亚采样锁相环,实现-256 dB的FoM。
161 fs RMS抖动(10kHz-100MHz),-67 dBc杂散,0.93 mW功耗
亚采样锁相环有源混频器低功耗高隔离度低杂散
创新点1:采用有源混频器替代传统采样保持开关和电荷泵(电路创新),通过有源混频器和g<sub>m</sub>-cell的组合结构,显著降低功耗至0.93 mW,同时提升相位检测精度,实现-256 dB的FoM指标。
创新点2:改进VCO与采样机制间的隔离(系统创新),通过有源混频器基相位检测器设计,减少VCO信号对采样过程的干扰,将参考杂散降低20 dB至-67 dBc,解决了SSPLL固有的高参考杂散问题。
创新点3:优化采样机制以降低功耗(方法创新),通过有源混频器的高效能量转换特性,在2.4 GHz工作频率下实现亚毫瓦级功耗(0.93 mW),同时保持161 fs的rms抖动性能。
创新点4:集成化设计提升整体性能(系统创新),在65 nm工艺下实现有源混频器与子采样PLL的高效集成,兼顾低功耗(0.93 mW)、低抖动(161 fs)和低杂散(-67 dBc)三项关键指标。
Abstract
An active-mixer-adopted sub-sampling phase- locked loop (AMASS-PLL) is presented that replaces the passive-mixer-like sample-and-hold switches and charge pump (CP) of a sub-sampling PLL (SSPLL) with an active-mixer and g m-cell, which reduces spurious content by 20 dB while enabling sub-mW power consumption at 2.4 GHz. Specifically, an active-mixer-based phase detector is used to improve the isolation between the voltage-controlled oscillator (VCO) and the sampling mechanism, which helps to addre