An Analog-Proportional Digital-Integral Multiloop Digital LDO With PSR Improveme

Abstract

This article presents a low-dropout regulator (LDO), with analog-proportional (AP) and digital integral (DI) controls. The design concerns are discussed at first, on how to improve the load transient response, enhance the power supply rejection (PSR), and reduce the limit cycle oscillation (LCO). For a good output dc accuracy, the DI section is implemented with shift-register-based coarse- a nd fine-tuning loops. Meanwhile, the AP section, based on a low-supply flipped-voltage follower (FVF), can r