A Single-Chip Bidirectional Neural Interface With High-V oltage Stimulation and Adaptive Artifact Cancellation in Standard CMOS John P. Uehlin , Member , IEEE, William

Abstract

A single-chip, bidirectional brain–computer interface (BBCI) enables neuromodulation through simultaneous neural recording and stimulation. This article presents a prototype BBCI application-specified integrated circuit (ASIC) consisting of a 64-channel time-multiplexed recording front- end, an area-optimized four-channel high-voltage compliant stimulator, and electronics to support the concurrent multi- channel stimulus artifact cancellation. Stimulator power generation is integrated on a chip, providing ±11-V compliance from low-voltage supplies with a resonant charge pump. High- frequency ( ∼3 GHz) self-resonant clocking is used to reduce the pumping capacitor area while suppressing the associated switching losses. A 32-tap least mean square (LMS)-based digital adaptive filter achieves 60-dB artifact suppression, enabling simultaneous neural stimulation and recording. The entire chip occupies 4 mm 2 in a 65-nm low power (LP) process and is powered by 2.5-/1.2-V supplies, dissipating 205 µW in recording and 142 µW in the stimulation and cancellation back-ends. The stimulation output drivers achieve 31% dc–dc efficiency at a maximum output power of 24 mW.