← 返回 JSSC 论文列表JSSC 2020第8期RF & Wireless65nmCDREqualizer
A 12-Gb/s 10-ns Turn-On Time Rapid ON/OFF Baud-Rate DFE Receiver in 65-nm CMOS Dongwook Kim , Student Member , IEEE, Mostafa G. Ahmed , Student Member , IEEE
一款65nm CMOS工艺的12Gbps快速启停接收器，支持10ns启动时间
12 Gb/s, BER < 10^-12, >30-MHz JTOL corner, 377 fs rms jitter, 3.8-pJ/bit
快速启停波特率决策反馈均衡器时钟数据恢复CMOS
▸创新点1：快速启停(ROO)操作（系统创新） - 该接收器实现了10纳秒的超快启动时间（约120个UI），通过动态调整DCO频率在每次上电时快速锁定时钟相位，显著提升了链路利用率下的功耗效率，支持3.8-pJ/bit的能效。
▸创新点2：新型波特率时钟数据恢复(CDR)（方法创新） - 提出了一种适用于解环DFE的时序函数，通过相位扫描技术实现快速时钟恢复，在12 Gb/s速率下达到377 fs rms的时钟抖动，同时支持>30-MHz的JTOL容限。
▸创新点3：解环决策反馈均衡器(DFE)（电路创新） - 采用三抽头DFE结构结合CTLE，可补偿高达20 dB的奈奎斯特频率信道损耗，解决了传统DFE环路延迟问题，实现了无迭代延迟的高速均衡。
▸创新点4：DCO频率偏移快速锁定技术（电路创新） - 在电源启动时主动偏移DCO频率以加速相位对齐，将传统CDR的锁定时间从微秒级缩短至纳秒级，为ROO操作提供了关键支持。
Abstract
R a p i dON /OFF (ROO) operation helps scale power in accordance with link utilization. In this article, we present a baud-rate ROO receiver that can turn on in just 10 ns ( ∼120 UI). Baud-rate clock and data recovery (CDR) is implemented using a new timing function that is amenable to operation with a loop un-rolled decision feedback equalizer (DFE). The receiver is turned on rapidly by sweeping the recovered clock phase across the received data bit by offsetting the digitally controlled oscillator (DCO) frequency at each power- ON event. This first ROO DFE receiver also includes a continuous-time linear equal- izer (CTLE) and three-tap DFE to compensate up to 20-dB channel loss at Nyquist. Fabricated in a 65-nm CMOS process, the prototype receiver recovers 12 Gb/s with BER < 10 –12 and achieves a >30-MHz JTOL corner, 377 fs rms recovered clock jitter, and 3.8-pJ/bit energy efficiency.