JSSC 2020第8期Digital Circuits40nm

A 217-mW Acoustic DSP Processor With CNN-FFT Accelerators for Intelligent Hearin

一款用于智能助听器的低功耗DSP处理器，集成CNN和FFT加速器，优化语音增强算法。

40nm CMOS, 0.6V, 5MHz, 4.2mm²核心面积, 2.17mW功耗

智能助听器CNN加速器FFT加速器语音增强低功耗设计

▸帧共享技术降低CNN计算复杂度23.6%

▸权重量化减少模型存储75%

▸可重构处理元件共享节省面积42%

Abstract

This article presents an acoustic DSP processor containing a neural network core for intelligent hearing assistive devices. The processor includes the accelerators for convolutional neural networks (CNNs) and fast Fourier transform (FFT). The CNN-based speech enhancement algorithm predicts the desired mask for the Fourier spectrogram of the speech signal to enhance speech intelligibility. Several design techniques are applied to enable efﬁcient hardware mapping. The computational complex- ity fo