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A 56 μ A Wide Bandwidth High Power Supply Rejection Linear Low-Dropout Regulator
一种采用电流模式前馈纹波消除器的LDO设计，实现高达68dB的电源抑制比和2MHz的宽频带抑制。
180nm BCD技术, 68dB PSR, 2MHz带宽, 250mA负载, 6.1µs恢复时间
线性低压差稳压器电源抑制比电流模式前馈宽频带抑制低静态电流
▸电流模式前馈纹波消除器（CFFRC）
▸无需校准的前馈路径增益匹配
▸低静态电流设计（5.6µA）
Abstract
High power supply rejection (PSR) with a wide
rejection frequency band is becoming a critical requirement in
linear low-dropout regulators (LDOs) used in complex systems-
on-chip (SOCs). Typical LDOs achieve higher PSR within their
loop-bandwidth; however, their supply rejection performance
degrades with reduced loop-gain outside their loop-bandwidth.
Typical LDOs with external filtering capacitors may also have
spectral peaking in their PSR response, causing excess system-
level supply noise. Th