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JSSC 2020第8期Digital Circuits0.18µm CMOSNeural Network Accelerator

Piezoelectric Energy-Harvesting Interface Using Split-Phase Flipping-Capacitor Rectifier With Capacitor Reuse for Input

提出一种分相翻转电容整流器(SPFCR),优化压电能量收集接口的电容数量与能量提取效率的权衡。
最大输出功率提升率(MOPIR)达9.3倍(VD=0.12V时)
压电能量收集翻转电容整流器能量提取效率最大功率点跟踪开关电容转换器
采用分相翻转电容技术提升能量提取效率
通过多电压转换比(MVCR)开关电容DC-DC转换器优化输入功率适配
利用全桥整流器(FBR)分数开路电压(VOC,FBR)实现最大功率点跟踪(MPPT)
Abstract
This article proposes a split-phase flipping-capacitor rectifier (SPFCR) to resolve the hard tradeoff between the num- ber of capacitors and the energy-extraction efficiency for capaci- tive piezoelectric energy-harvesting (PEH) interfaces. By splitting the capacitor usage into multiple phases, this article can achieve the most number of flipping phases using the same number of capacitors when compared with the state of the art. We also relaxed the implementation complexity by removing insignificant SFPCR flipping phases without sacrificing the energy-harvesting efficiency. To improve further the input power adaptation, the flipping capacitors are reconfigured as a multiple-voltage- conversion-ratio (MVCR) switched-capacitor dc–dc converter during the non-flipping period without using extra passives. Maximum-power-point tracking (MPPT) is also accomplished using the full-bridge rectifier (FBR) fractional open-circuit voltage ( V OC,FBR) to relax the voltage-tolerance requirements. Fabricated in 0.18- µm CMOS, the proposed 21-phase SPFCR PEH interface demonstrates a measured maximum output power improving rate (MOPIR) of up to 9.3× with V D = 0.12 V (6.5× with VD = 0 V) when compared with the conventional FBR interface over an equivalent FBR input power range ( Pin, FBR) from 0.15 to 5.57 µW.