← 返回 JSSC 论文列表
📄 下载 JSSC 原文 PDF
JSSC 2020第8期Digital CircuitsNeural Network Accelerator

Tianjic: A Unified and Scalable Chip Bridging Spike-Based and Continuous

Tianjic芯片提出统一架构,支持脉冲神经网络与深度学习模型的高效兼容运行。
未明确披露(提及支持动态生物神经网络与深度学习加速)
神经形态计算深度学习统一架构众核网络硬件兼容性
统一模型描述框架
支持多类神经网络(SNN/CNN/RNN等)
去中心化众核网络的同构/异构扩展能力
Abstract
Toward the long-standing dream of artificial intelligence, two successful solution paths have been paved: 1) neuromorphic computing and 2) deep learning. Recently, they tend to interact for simultaneously achieving biological plausibility and powerful accuracy. However, models from these two domains have to run on distinct substrates, i.e., neuromorphic platforms and deep learning accelerators, respectively. This architectural incompatibility greatly compromises the model- ing flexibility and hinders promising interdisciplinary research. To address this issue, we build a unified model description framework and a unified processing architecture (Tianjic), which covers the full stack from software to hardware. By implementing a set of integration and transformation operations, Tianjic is able to support spiking neural networks, biological dynamic neural networks, multilayered perceptron, convolutional neural networks, recurrent neural networks, and so on. A compatible routing infrastructure enables homogeneous and heterogeneous scalability on a decentralized many-core network. Several opti- Manuscript received July 31, 2019; revised November 2, 2019; accepted January 22, 2020. This article was approved by Associate Editor Edith Beigne. This work was supported in part by the National Natural Science Foundation of China under Project 61836004 and Project 61327902, in part by the National Key R&D Program of China under Grant 2018YFE0200200, in part by the Brain-Science Special Program