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JSSC 2020第9期Power Management65nm

Hybrid Dickson Switched-Capacitor Converter With Wide Conversion Ratio in 65-nm CMOS

65nm CMOS工艺下实现宽转换比混合Dickson开关电容转换器,峰值效率达92.6%。
65nm CMOS, 3.4-4.2V输入, 0.3-0.9V输出, 1.5A, 330mW/mm², 92.6%效率
混合开关电容转换器Dickson拓扑宽转换比翻转芯片封装高密度中介层
混合Dickson开关电容架构实现4:1原生转换比
采用分段栅极驱动器降低功率开关电压振铃
集成闭环电压调节与主动电容电压平衡技术
Abstract
Hybrid switched-capacitor (SC) converters have shown great promise in achieving high efficiency and power density for dc–dc conversion. By combining an SC stage with an inductor filter stage, benefits from both approaches can be realized. In this work, a hybrid Dickson SC converter with a 4:1 native conversion ratio and regulated output voltage range of 0.3–0.9 V from a 3.4 to 4.2-V lithium-ion battery and the effective switching frequency of 1 MHz was implemented in 65- nm bulk CMOS process. The converter achieves maximum output current of 1.5 A, the power density of 330 mW/mm 2,a n d a peak efficiency of 92.6%. The converter is packaged using flip-chip technology with passive devices co-packaged through a high-density interposer to minimize the packaging parasitics and volume. A segmented gate driver is used to enhance the converter efficiency and reliability by maintaining low-voltage ringing across the power switches. The converter is integrated with closed-loop output voltage regulation, dead-time control, and active capacitor–voltage balancing to maximize the active and passive device utilizations.