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A Calibration-Free 14-b 07-mW 100-MSs Pipelined-SAR ADC Using a Weighted-Averagi
提出一种无需校准的14位100MS/s流水线-SAR ADC，采用加权平均相关电平移位技术。
28nm CMOS, 0.7mW, 100MS/s, 71.7dB SNDR
ADC流水线-SAR无需校准低功耗高速
▸加权平均相关电平移位(WACLS)技术消除运放增益误差
▸改进的参考交换(RS)技术减少电容失配误差
▸快速启动环形放大器设计实现节能控制
Abstract
This article presents a 14-b 100-MS/s single-channel
pipelined-successive-approximation register (SAR) ADC using a
weighted-averaging correlated level shifting (WACLS) technique.
For a closed-loop residue amplification, the error voltage due
to the finite operational amplifier (opamp) gain can be ideally
removed by the proposed W ACLS technique with a low-gain
opamp. In addition, the opamp bandwidth degradation, by an
extra level-shift capacitor ( C
LS) in two-phase amplification
CLS-based circuits,