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A1 5 -µJTask Path-Planning Processor for 2-D3-D Autonomous Navigation of Micror
提出一种用于2-D/3-D自主导航的低能耗路径规划处理器，采用RRT算法和并行扩展技术优化性能。
40nm CMOS, 0.9V, 200MHz, 1.5µJ/task
路径规划自主导航RRT算法低功耗设计并行处理
▸采用双树规划和分支扩展技术降低计算复杂度
▸引入剪枝与重用策略应对动态场景
▸通过并行处理引擎阵列实现高效路径规划
Abstract
Autonomous microrobots have been utilized in a
wide range of applications. Energy-efficient, real-time path plan-
ning for navigation is essential. This work presents a path-
planning processor for 2-D/3-D autonomous navigation. Energy
and latency are minimized through algorithm-architecture opti-
mization. The processor utilizes the rapidly exploring random
tree (RRT) algorithm to ensure efficient planning on maps
that have higher dimensions and a higher resolution. Dual-tree
planning, branch ext