← 返回 JSSC 论文列表JSSC 2021第1期Clocking & PLLs65nmVCO
A Low-Jitter and Low-Reference-Spur Ring-VCO- Based Injection-Locked Clock Multiplier Using a Triple-Point
提出一种低抖动、低参考杂散的环形VCO注入锁定时钟倍频器,采用三重校准技术实现高性能。
2.4GHz输出信号,参考杂散-72dBc,RMS抖动140fs
环形VCO注入锁定时钟倍频器低抖动低参考杂散三重校准
▸三重频率/相位/斜率校准器(TP-FPSC)
▸频率漂移校准环路抑制带内相位噪声
▸注入锁定机制实现低RMS抖动
Abstract
This work presents a low-jitter , low-reference-spur ring voltage-controlled oscillator (ring VCO)-based injection- locked clock multiplier (ILCM). Since the proposed triple-point frequency/phase/slope calibrator (TP-FPSC) can accurately remove the three root causes of the frequency errors of ILCMs (i.e., frequency drift, phase offset, and slope modulation), the ILCM of this work is able to achieve a low-level-reference spur . In addition, the calibrating loop for the frequency drift of the TP-FPSC offers an additional suppression to the in-band phase noise of the output signal. This capability of the TP-FPSC and the naturally wide bandwidth of the injection-locking mechanism allows the ILCM to achieve a very low-RMS jitter . The ILCM was fabricated in a 65-nm CMOS technology. The measured reference spur and RMS jitter of the 2.4-GHz output signal were −72 dBc and 140 fs, respectively, both of which are the best among the state-of-the-art ILCMs. The active silicon area was 0.055 mm 2 , and the power consumption was 11.0 mW.