A Multi-Branch Receiver With Modulated Mixer Clocks for Concurrent Dual-Carrier Reception and Rapid Compressive-Sampling

Abstract

A multi-branch receiver is introduced that uses mixer-clock modulation to unify the functions of single-carrier and concurrent dual-carrier reception, as well as compressive- sampling spectrum scanning into a single architecture. With CW-modulated mixer clocks, the receiver achieves concurrent reception from two distinct bands and realizes tuned impedance matching that greatly improves i ts out-of-band (OB) linearity. With pseudo-noise (PN)-modulated mixer clocks, the receiver supports rapid spectrum scanning. Disabling modulation reverts the receiver to a single-carrier receiver with good OB linearity. A 65-nm CMOS prototype is presented that offers 2.7-dB mini- mum NF, −1.3-dBm B1dB, and +8-dBm IIP3 for high-sensitivity single-carrier reception. Concurrent dual-carrier reception at 500 and 900 MHz is demonstrated that offers −8.4-dBm B1dB and sub-6-dB NF . In the CS spectrum scanning mode, the receiver achieves a 66-dB dynamic range with −75-dBm sensitivity over a 630-MHz RF span and consumes 18.7 nJ per detected signal.