JSSC 2021第2期RF & Wireless28nmNeural Network Accelerator

A 0.02–4.5-GHz LN(T)A in 28-nm CMOS for 5G Exploiting Noise Reduction and

提出一种新型噪声降低技术，用于改善5G接收器中宽带低噪声跨导放大器的噪声系数。

28nm CMOS, 1V, 4.5mW, NF 2.09–3.2 dB, S11 < -10 dB, 带宽 20 MHz–4.5 GHz, 增益 15.2 dB, IIP3 -4.6 dBm

噪声降低5G接收器宽带低噪声跨导放大器电流重用CMOS

▸创新点1：噪声降低/消除技术（方法创新） - 通过结合共栅（CG）级和共源（CS）级，CG级实现宽带输入匹配，CS级用于抵消CG级的噪声和失真，进一步通过噪声降低技术减少CS级本身的沟道热噪声，显著改善噪声系数（NF）至2.09-3.2 dB。

▸创新点2：电流重用技术（电路创新） - 利用电流重用技术，在提高CS晶体管跨导的同时保持低功耗，仅消耗4.5 mW的功率，实现了高增益（15.2 dB）和低功耗的平衡。

▸创新点3：宽带性能优化（系统创新） - 在20 MHz–4.5 GHz的3 dB带宽内，输入回波损耗（S11）优于-10 dB，同时驱动外部50Ω负载，展现了优异的宽带匹配和驱动能力。

▸创新点4：高线性度设计（电路创新） - 通过优化噪声消除和电流重用技术，实现了较高的三阶交调点（IIP3）为-4.6 dBm，提升了接收机的线性度性能。

Abstract

In this article, a new noise reduction/cancellation technique is proposed to improve noise ﬁgure (NF) of a broadband low-noise transconductance ampliﬁer (LNTA) for 5G receivers. The LNTA combines a common-gate (CG) stage for wideband input matching and a common-source (CS) stage for canceling the noise and distortion of the CG stage. Yet, another noise reduction is applied to reduce the channel thermal noise of the noise cancellation stage itself. The technique further exploits current reuse and increases transconductance of the CS transistor while keeping its power consumption low. Fabricated in 28-nm CMOS, the proposed LNTA is capable of driving an external 50-/Omega1load and achieves a NF of 2.09–3.2 dB and i nput return loss ( S 11) better than −10 dB over the 3-dB bandwidth of 20 MHz–4.5 GHz while consuming 4.5 mW from a single 1-V power supply. The achieved gain ( S 21) and IIP3 are 15.2 dB and −4.6 dBm, respectively.