A Radio Frequency Analog Computer for

Abstract

Software-programmable analog computing is pro- posed for power- and area-efficient acceleration of computa- tional electromagnetics. All-pass filters are employed to realize a continuous-time finite-difference time-domain (FDTD) algorithm. A CMOS realization of an analog computer (AC) that solves the 1-D wave equation using this time-continuous FDTD algorithm at an equivalent temporal update rate of 625 MHz is reported (180-nm CMOS, chip area of 4 mm 2, supply voltage = 1.8V , and power = 200 mW). The AC operates at up to 30 MHz over 18 discrete spatial points. Analog arithmetic operations (multiply and add) are realized in parallel using op-amps with gain–bandwidth product > 500 MHz. Computational grid boundaries can be configured to simulate multiple prop agation scenarios. The AC is calibrated using a stochastic optimization algorithm. The normalized mean squared error of the AC varies between −10 and −20 dB within the computational grid. The power- and area-normalized performance of the design improves on earlier integrated ACs by up to three orders of magnitude. The chip is also 26× faster than a C-based software FDTD solver running on an Intel Xeon CPU and 420 × faster than CUDA FDTD code running on an NVIDIA GeForce GTX 1080 Ti GPU, albeit at lower accuracy ( ∼6 bits). Finally, the AC is 2 .8× faster than a digital systolic array FDTD processor realized using a Xilinx RFSoC Z CU1275 and has 15 × better power efficiency (computations/W).