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JSSC 2021第2期Power Management65nmVCOProcessor/CPU

A Supply V oltage Control Method for Performance Guaranteed Ultra-Low-Power Microcontroller

提出一种通过数字延迟线匹配调节电源电压的方法,确保超低功耗微处理器性能稳定。
65nm CMOS, 亚阈值操作, 实时应用性能保证
电源电压控制超低功耗数字延迟线亚阈值操作性能保证
数字延迟线匹配调节电源电压
确保计算性能在PVT变化下稳定
优化亚阈值操作的CPU和存储器设计
Abstract
This article presents the control circuit of a power converter that regulates the computing speed of a digital circuit. The proposed circuit implements a digital delay regulation of a digital delay line (DDL) matched with the ring oscillator (RO) that clocks the digital subsystem. The converter regulates the supply voltage of the digital subsystem so that the prop agation delay through the DDL matches a time reference. Consequently, the frequency of the RO tracks the DDL delay and the frequency keeps a controlled value over process, voltage, and temperature (PVT). A 65-nm CMOS prototype validates the proposed method. The prototype includes an Arm Cortex-M33 CPU and memo- ries optimized for sub-threshold operation. With the proposed method, the computing performance of the CPU is guaranteed for running real-time application while minimizing the supply voltage margins.