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JSSC 2021第2期Digital Circuits16nm

SNAP An Efficient Sparse Neural Acceleration Processor for Unstructured Sparse De

提出SNAP稀疏神经网络加速处理器,通过并行关联搜索优化稀疏计算,提升能效比。
16nm CMOS, 0.55V-0.80V, 260-480MHz, 21.55 TOPS/W, 348mW
神经网络加速器稀疏计算能效优化非结构化剪枝硬件加速
并行关联搜索技术处理非结构化稀疏数据
两级部分和归约数据流减少输出缓冲争用
支持多种卷积层和全连接层的可配置模式
Abstract
Recent developments in deep neural network (DNN) pruning introduces data sparsity to enable deep learning applica- tions to run more efficiently on resource- and energy-constrained hardware platforms. However, these sparse models require spe- cialized hardware structures to exploit the sparsity for storage, latency, and efficiency improvements to the full extent. In this work, we present the sparse neural acceleration processor (SNAP) to exploit unstructured sparsity in DNNs. SNAP uses paral- lel