A Highly Linear and Efficient 28-GHz PA With a Psat of 23.2 dBm, P1d B of 22.7 dBm, and PAE of 35.5% in 65-nm Bulk CMOS

Abstract

This article presents a 28-GHz power amplifier (PA) suitable for fifth-generation (5G) wireless systems. Designed in a 65-nm bulk CMOS, the PA achieves a saturated output power ( P sat) of 23.2 dBm at 28 GHz. The AM–AM and the AM–PM distortion have the overshoot of less than 0.3 dB and 0.2 ◦, respectively, at 28 GHz. The AM–PM variation remains less than 1.9 ◦ over the frequency band of 26–31 GHz with a peak power- added efficiency (PAE) of 35.5%. Several techniques, including strategic placement of varactors, a proposed multi-function coplanar-waveguide (CPW)-like power combining structure, and a systematic design approach for the passive networks, are used to improve the efficiency and linearity of the design leading to a negligible difference between P 1d B and Psat. The proposed lin- earity improvement technique, which uses an adaptive feedback structure to adjust the input impedance of the output stage based on the output power and also direct more current at higher output power levels, enhances the linearity through lowering both AM–AM and AM–PM conversions. The design enables 2.5-GS/s 64-QAM operation at average P out of 16.1 dBm with an error- vector magnitude/adjacent-channel power ratio (EVM/ACPR) of better than −26.2-dB/−28.32-dBc without using any digital pre- distortion.