← 返回 JSSC 论文列表JSSC 2021第3期Data ConvertersSAR ADCCMOS Image Sensor
Low Bit-Depth ADCs for Multi-bit Quanta Image Sensors Zhaoyang Yin Graduate Stu
比较SAR和SS ADC在量子图像传感器中的功耗表现，SAR ADC功耗更低。
1024 × 896 test chip, 1b to 6bits resolution
量子图像传感器低功耗SAR ADCSS ADCADC功耗比较
▸比较五种ADC在量子图像传感器中的功耗
▸实现SAR和SS ADC并测量其功耗
▸SAR ADC在1b到6b分辨率下功耗降低17倍
Abstract
A 1024 × 896 test chip is presented in this article
to explore a low-power readout circuit for a multi-bit quanta
image sensor (QIS). Five well-known analog-to-digital converter
(ADC) approaches [flash, pipeline, successive approximation
register (SAR), cyclic, and single-slope (SS)] are studied, and
two types of ADCs, namely, SAR ADCs and SS ADCs, are
implemented in the sensor. The ADC power dissipations are
compared under the condition of constant imaging throughput
in counting photoelectrons.