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A 05-V 560-kHz 188-fJCycle On-Chip Oscillator With 961-ppmC Steady-State Stabili
一种基于DFLL的低功耗片上振荡器，适用于IoT应用
65nm CMOS, 0.5V, 560kHz, 18.8fJ/cycle
片上振荡器低功耗数字频率锁定环IoT温度稳定性
▸创新点1：采用数字频率锁定环(DFLL)技术实现频率稳定，通过数字控制环路动态调整振荡频率，相比传统模拟PLL降低功耗至188-fJ/cycle，同时保持961-ppm/°C的温度稳定性（方法创新）
▸创新点2：提出周期性唤醒机制，通过智能禁用高能耗组件（如偏置电流源、分频器、比较器）实现动态节能，在非校准阶段仅维持基础振荡，使平均功耗降至10.5nW（系统架构创新）
▸创新点3：设计温度漂移自适应补偿算法，通过DFLL的间歇性重启（而非持续运行）完成频率校准，在-0°C至100°C范围内实现96.1-ppm/°C的稳态稳定性（算法创新）
▸创新点4：采用65nm CMOS工艺实现超低电压工作（0.5V），通过亚阈值电路设计和电源优化技术，将工作频率稳定在560kHz的同时突破传统振荡器pJ/cycle能效限制（电路级创新）
Abstract
On-chip oscillators are popular clocking solutions
for a wide range of circuits and systems due to their ease
of integration and low form factor, but their energy efficiency
is typically limited to the pJ/cycle range by a number of
contributors, such as active biasing currents, frequency dividers,
and comparators. This work presents an on-chip oscillator
for energy-efficient Internet-of-Things (IoT) applications based
on a duty-cycled digital frequency-locked loop (DFLL) that
reduces energy by dis