← 返回 JSSC 论文列表JSSC 2021第4期Memory10nmNeural Network Accelerator
A 617-TOPSW All-Digital Binary Neural Network Accelerator in 10-nm FinFET CMOS P
一款采用10nm FinFET CMOS工艺的全数字二进制神经网络加速器,峰值能效达617 TOPS/W。
10nm FinFET CMOS, 峰值能效617 TOPS/W, 计算密度418 TOPS/mm², 内存密度414 KB/mm²
二进制神经网络全数字加速器计算近内存近阈值电压能效优化
▸采用计算近内存(CNM)架构减少互连和数据移动开销
▸利用近阈值电压(NTV)轻量级流水线降低时序元件开销
▸通过优化的数据访问模式减少卷积和池化操作的内存访问
Abstract
A binary neural network (BNN) chip explores the
limits of energy efficiency and computational density for an
all-digital deep neural network (DNN) inference accelerator. The
chip intersperses data storage and computation using compu-
tation near memory (CNM) to reduce interconnect and data
movement costs. It performs wide inner product operations to
leverage parallelism inherent in DNN computations. The BNN
chip leverages lightweight pipelining at a near-threshold voltage
(NTV) to reduce the over