An 8-Bit 1-GSs Asynchronous Loop-Unrolled SAR-Flash ADC With Complementary Dynam

Abstract

An 8-bit 1-GS/s asynchronous loop-unrolled (LU) successive approximation register (SAR)-Flash hybrid analog- to-digital converter (ADC) with complementary dynamic ampli- fiers (CDAs) is presented. The proposed ADC is a combination of an asynchronous LU-SAR ADC and a reference-embedding 8× interpolating flash (I-Flash) ADC to enhance the conversion speed. Operating the CDAs in a dual-edge manner makes it possible to achieve an 8-bit resolution with only four CDAs and one capacitive digital-to-analo