JSSC 2021第4期Memory55nmEmerging Memory

Dual-Port SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations Under Field

本文展示了一种基于SOT-MRAM的非易失性存储器，采用55nm CMOS工艺，实现60MHz写入和90MHz读取操作。

55nm CMOS, 1.2V, 60MHz写入, 90MHz读取

SOT-MRAM非易失性存储器双端口自终止CMOS工艺

▸创新点1：采用SOT-MRAM技术，利用自旋轨道转矩（SOT）切换的三端MTJ器件，实现了无读取干扰的非易失性存储，解决了传统STT-MRAM在高速读取时可能导致的意外写入问题。

▸创新点2：双端口配置设计，通过三端器件结构实现了宽带宽，适用于高速应用场景，支持60-MHz写入和90-MHz读取操作，显著提升了存储器的访问速度。

▸创新点3：自终止读取节能技术（self-termination scheme），有效降低了读取能耗，提高了能效比，适用于低功耗物联网（IoT）和人工智能（AI）应用。

▸创新点4：在55-nm CMOS工艺下实现了SOT-MRAM的原型芯片，验证了其在无磁场条件下的高性能表现，为未来大规模商业化应用提供了技术基础。

Abstract

The development of new functional memories using emerging nonvolatile devices has been widely investigated. Spin-transfer torque magnetoresistive random access memory (STT-MRAM) has become new technology platform to overcome the issue in power consumption of logic for the application from IoT to AI; however, STT-MRAM has a tradeoff relationship between endurance, retention, and access time. This is because the MTJ device used in STT-MRAM is a two-terminal device, and excessive read current for h