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10 A 40-MHz Bandwidth 75-dB SNDRPartial-Interleaving SAR-Assisted Noise-Shaping
一种采用部分交织技术和噪声整形的高带宽、高能效SAR辅助流水线ADC。
28nm CMOS, 1V, 40MHz BW, 75.2dB SNDR, 2.56mW
SAR ADC噪声整形部分交织动态放大器数据加权平均
▸采用多输入动态放大器实现低功耗一阶噪声整形
▸引入残差前馈路径补偿增益失配导致的NTF恶化
▸部分交织一级结构突破传统三相位时序的速度瓶颈
Abstract
This article presents a successive approximation
register (SAR)-assisted noise- shaping (NS) pipeline analog-
to-digital converter (ADC) incorporating various techniques to
improve its bandwidth (BW), energy efficiency, and robustness.
A multiple-input dynamic amplifier is used for both residue
amplification and error feedback (EF) summation, thus realizing
a 1st-order NS with low power consumption. An additional
residue feed-forward (FF) path is introduced in the 2nd-stage
SAR ADC to compensate fo