A Bidirectional Neural Interface SoC With Adaptive IIR Stimulation

Abstract

We present a 180-nm CMOS bidirectional neural interface system-on-chip that enables simultaneous recording and stimulation with on-chip s timulus artifact cancelers. The front-end (FE) cancellation scheme incorporates a least-mean- squares (LMS) engine that adapts the coefficients of a two- tap infinite-impulse-response filter to replicate the stimulation artifact waveform and subtract it at the FE. Measurements demonstrate the efficacy of the canceler in mitigating artifacts up to 700 mV pp and reducing the FE amplifier saturation recovery time in response to a 2.5-V pp artifact. Each recording channel houses a pair of adaptive infinite-impulse-response filters, which enables the cancellation of the artifacts generated by the simultaneous operation of the two on-chip stimulators. The analog FE consumes 2.5 µW of power per channel and has a maximum gain of 50 dB and a bandwidth of 9.0 kHz with 6.2- µV rms integrated input-referred noise.