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JSSC 2021第7期RF & Wireless40nmLNANeural Network Accelerator

A Cryogenic Broadband Sub-1-dB NF CMOS Low Noise Amplifier for

报道了一种基于40nm CMOS工艺的低温宽带低噪声放大器,用于量子应用。
40nm CMOS, 4.1-7.9 GHz, 0.23-0.65 dB NF, 39-51.1 mW
低温宽带低噪声放大器CMOS量子应用
利用输入晶体管的栅漏电容实现宽带输入匹配和低噪声
采用LC并联谐振电路扩展带宽
通过变压器谐振器实现双谐振频率负载
Abstract
A cryogenic broadband low noise amplifier (LNA) for quantum applications based on a standard 40-nm CMOS technology is reported. The LNA specifications are derived from the readout of semiconductor quantum bits at 4.2 K, whose quan- tum information signals are characterized as phase-modulated signals. To achieve broadband input matching impedance and low noise figure, the gate-to-drain capacitance of the input transistor is exploited. The goal is to involve a resistive and capacitive load into the input impedance match of a common-source stage with source inductive degeneration. The capacitive load is created by an LC parallel tank whose resonant frequency is lower than the operating frequency. The achieved non-constant in- band equivalent capacitance is proven to be beneficial to input impedance matching. The resistive part of the load is provided by the transconductance of the cascode stage implicitly. An inductor is added to the gate of the cascode transistor to suppress its noise, and a transformer-based resonator with two resonant frequencies serves as the load of the first stage, thus extending the operating bandwidth. Design considerations for the cryogenic temperature operation of the LNA are proposed and analyzed. The LNA achieves a measured gain ( S 21)o f3 5 ± 0.5 dB, return loss > 12 dB, and NF of 0.75–1.3 dB across the band (4.1–7.9 GHz), with 51.1-mW power consumption at room temperature, while it shows a measured gain of 42 ± 3.3 dB, and NF of 0.23–0.65 dB with 39-mW