← 返回 JSSC 论文列表
📄 下载 JSSC 原文 PDF
JSSC 2021第8期Clocking & PLLs

A PVT V ariation-Robust All-Digital Injection- Locked Clock Multiplier With Real-Time Offset Tracking Using Time-Division

提出一种PVT变化鲁棒的全数字注入锁定时钟倍频器,通过时间分割双校准技术优化性能。
无具体性能指标
注入锁定振荡器时钟倍频器相位检测时间分割双校准PVT变化鲁棒
创新点1:数字控制的Bang-Bang相位检测器(BBPD):该方法创新通过离散时间域的数字控制,精确调节注入锁定振荡器的相位,显著提升了时钟倍频器的抖动性能和杂散抑制能力。
创新点2:时间分割双校准技术(TDDC):该电路创新通过时间分割的方式,分别校准复制单元与BBPD之间的时序偏移,有效减少了器件失配带来的影响,确保了频率误差的精确补偿。
创新点3:三阶段复制单元设计:该系统创新采用三阶段复制单元结构,增强了相位生成的鲁棒性,并通过多级延迟单元消除残余相位偏移,确保了最佳锁定点的实现。
创新点4:定量分析数字注入锁定时钟倍频器(ILCM)的动态特性:该方法创新提供了对ILCM动态行为的定量分析,为优化设计提供了理论依据,进一步提升了系统的整体性能。
Abstract
Although an injection-locked oscillator (ILO) can offer excellent jitter performanc e on average, its intense phase modification at a given injection rate inevitably degrades spur performance, unless injection timing is carefully controlled. This work investigates a behavioral model of the ILO with digital control of a bang-bang phase detector (BBPD) on a discrete-time domain, a quantitative analysis on the dynamics of the digital injection-locked clock multiplier (ILCM) is provided. Adjusting frequency error between the free-running oscillator and the injec- tion signal is crucial to obtain better spur performance. However, the timing offset caused by the device mismatches hinders it from being correctly compensated. Therefore, we investigate the effect of timing offset (or mismatch) between the replica cells and BBPD and then propose the time-division dual calibration (TDDC) to reduce the discrepancies. In addition, three-stage replica cells are chosen to achieve a robust operation in the phase generating aspect. By removing the residual phase offset using multiple delay cells, the optimum locking point is guaranteed.