A Software-Defined Always-On System With 57–75-nW Wake-Up Function Using Asynchronous Clock-Free Pipelined Event-Driven Architecture and Time-Shielding Level-Crossing ADC

Abstract

This work presents an ultra-low-power software- defined always-on wake-up system to drastically decrease the system power of Internet of Things (IoTs) devices, which usually operate in random-sparse-event (RSE) scenarios. It mainly thanks to a clock-free time-shielding level-crossing ADC (TS-LCADC), software-defined clock-free multi-function detec- tors, and an asynchronous pipelined event-driven architecture. First, by quantifying RSE noisy signals with clock-free adap- tive sampling in a signal-noise-r ejecting manner, the proposed TS-LCADC reduces number of sampling points and power, and consumes only 41 nW when on-call waiting for IoT events. Second, the proposed clock-free multi-function detectors with offline and online programmability are able to character the signal features of versatile IoTs events and allow versatile and dynamic wake-up functions. Third, the proposed asynchronous pipelined event-driven architecture minimizes the system activity and thus power, because a power-hungry high-performance system (HPS) is only woken up when a detected parameter crosses its corresponding threshold. As such, the long-term average power (LTA-power) is dominated by the always-on circuits in RSE scenarios. The measurement results achieve 71–75 nW for three typical applications, i.e., heart rate, epilepsy, and keyword envelope detection. The LTA power is only 57 nW when waiting for RSE events, which is 30 × lower than a prior general-purpose wake-up chip. Compared with other works