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JSSC 2021第9期Digital Circuits180nmNeural Network Accelerator

An Offset-Cancelling Discrete-Time Analog Computer for Solving 1-D

一款基于开关电容技术的离散时间模拟计算机芯片,用于求解一维波动方程。
180nm CMOS, 560mW功耗, 41dB动态范围, 2.5MHz计算带宽
模拟计算机波动方程开关电容相关双采样Δ-Σ调制器
采用开关电容全差分模拟电路实现离散时间连续值有限差分求解器
利用相关双采样和自动归零技术降低运放偏移和低频噪声
内置三阶Δ-Σ调制器便于数字处理器读取模拟解
Abstract
This article describes a single-chip analog computer for solving 1-D wave equations. The chip uses switched-capacitor (SC)-based fully differential analog circuits to build a discrete- time but continuous-valued finite difference solver with spatially programmable wave velocity, selectable boundary conditions, and arbitrary input excitation waveforms. Correlated double sampling (CDS) and auto-zero techniques are utilized to minimize the offset and low-frequency noise of the op-amps. Built-in third-order /Delta1-/Sigma1modulators allow the analog solution to be easily read out by a digital processor. The design was realized in TSMC 180-nm CMOS and has an active area of 3.596 mm × 3.131 mm. The solver consumes 560 mW while providing a dynamic range (DR) of 41 dB and a computational bandwidth of either 2.5 MHz (if limited by the analog core) or 0.25 MHz (if limited by the on-chip modulators). Normalized mean squared solution errors for a typical problem (uniform medium with radiation boundary condition) range from 0.3% to 2% ( −25 to −17 dB). Measured simulation times are 21 ×,5 ×,a n d1 . 3× faster than CUDA-C code running on a modern GPU (NVIDIA GTX 1080 Ti) and MATLAB or C code r unning on an 8-core CPU (Intel Xeon Silver 4110 at 2.10 GHz), respectively.