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Two-Direction In-Memory Computing Based on 10T SRAM With Horizontal and Vertical
提出一种基于10T SRAM的双向内存计算架构，消除垂直数据存储需求并提升计算稳定性。
28nm CMOS工艺，0.9V电压，读裕度达传统6T SRAM的3倍
内存计算10T SRAM并行处理内容寻址存储器低功耗设计
▸采用十字形字线布局实现多行/多列并行激活的向量逻辑运算
▸新型水平读取通道支持矩阵转置操作
▸自终止结构降低38.5%搜索能耗（0.9V TT工艺角）
Abstract
In-memory computing establishes a new and
promising computing paradigm aimed at solving problems caused
by the von Neumann bottleneck. It eliminates the need for
frequent data transfer between the memory and processing
modules and enables the parallel activation of multiple lines.
However, vertical data storage is generally required, increasing
the implementation complexity for the SRAM writing mode.
This article proposes a 10-transistor (10T) SRAM to omit
vertical data storage and improve the s