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A 310-nA Quiescent Current 3-fs-FoM Fully Integrated Capacitorless Time-Domain LDO With Event-Driven Charge Pump and Feedforward
提出一种用于物联网边缘传感器的无电容时间域LDO,静态电流仅310nA,FoM为3fs。
65nm CMOS, 0.5-1.2V输入范围, 310nA静态电流, 1.0×10^6负载动态范围, 3-fs FoM
无电容LDO时间域处理低静态电流物联网传感器事件驱动电荷泵
▸采用基于振荡器的电压-时间转换和时间域信号处理替代传统OTA误差放大器
▸提出基于时钟边沿的频率比较器,功耗降低6倍以上
▸采用事件驱动电荷泵和前馈电容增强瞬态响应
Abstract
In this article, a fully integrated capacitorless low- dropout regulator (LDO) is presented for Internet-of-Things (IoT) edge sensor application. To achieve sub-1-V operation and fast transient response with low quiescent current, the con- ventional operational transconductance amplifier (OTA)-based error amplifier (EA) is replaced with oscillator-based voltage- to-time converter and time-domain signal processing, includ- ing time-domain edge-based frequency comparator (FC) and event-driven voltage mode charge pump (CP). Compared with the conventional phase frequency detector (PFD), the proposed clock- edge-based FC achieved more than six times power reduction. Event-driven CP is adopted to drive analog power transistor and the transient response is enhanced by feedforward capacitor C FD and coarse–fine CP control. To further reduce the power con- sumption, multi-voltage domain and clock frequency optimization are implemented. A prototype chip is fabricated in a standard 65-nm CMOS process. The design only consumes 310-nA qui- escent current while achieving 0.5–1.2-V i nput range, 1.0 × 10 6 load dynamic range, and 3-fs figure of merit (FoM).