JSSC 2021第11期RF & Wireless28nmLNA

A 22.9–38.2-GHz Dual-Path Noise-Canceling LNA With 2.65–4.62-dB NF in 28-nm CMOS

提出一种22.9-38.2GHz双路径噪声消除低噪声放大器，采用28nm CMOS工艺实现低噪声和高性能。

28nm CMOS, 0.9V, 18.9mW, NF 2.65-4.62dB, 峰值增益14.5dB

低噪声放大器噪声消除毫米波CMOS宽带匹配

▸创新点1：双路径噪声消除技术（方法创新） - 通过同时优化共栅极（CG）和共源极（CS）放大器的噪声贡献，实现双路径噪声抵消，在22.9-38.2 GHz频段内将噪声系数（NF）降至2.65-4.62 dB，显著提升接收机灵敏度。

▸创新点2：三阶变压器增益提升与噪声降低（电路创新） - 在CG路径中采用三阶变压器结构，通过多级耦合实现宽带级间匹配（22.9-38.2 GHz），同时提供增益提升（峰值增益14.5 dB）和噪声抑制的双重功能，解决了毫米波频段传统匹配网络的带宽限制问题。

▸创新点3：可重构相位调谐线优化噪声消除（系统创新） - 在双路径中集成幅度调节放大器与可编程相位调谐线，动态调整两路信号的幅度和相位关系，使噪声消除效果在宽频带内保持最优，实测IP1dB达-13.2至-6.6 dBm。

▸创新点4：28-nm CMOS工艺下的高效能设计（工艺创新） - 在0.9V低电源电压下仅消耗18.9 mW功耗，通过变压器耦合和反馈结构优化，实现IIP3达-3.6至3.2 dBm的线性度，验证了纳米工艺在毫米波频段的可行性。

Abstract

In this article, a 22.9–38.2-GHz dual-path noise- canceling low noise ampliﬁer (LNA) is proposed, which can achieve a low noise ﬁgure (NF) by reducing the noise of both paths. Such LNA consists of one common gate (CG) ampli- ﬁer with one three-stage transformer, one resistive feedback common-source (CS) ampliﬁer, and two amplitude-adjusting ampliﬁers. The three-stage transformer is used in the CG ampliﬁer to provide gain-boosting, noise-reducing, and wide- band inter-stage matching operation, simultaneously. Meanwhile, amplitude-adjusting ampliﬁers with reconﬁgurable phase-tuning lines are utilized in both paths to optimize the noise-canceling performance. To verify the aforementioned principle, a dual- path noise-canceling LNA is implemented and fabricated using a conventional 28-nm CMOS technology. The proposed LNA consumed 18.9 mW under a 0.9-V supply. The measured NF is 2.65–4.62 dB within the operating frequency range of 22.9–38.2 GHz, while the peak gain is 14.5 dB. The in-band input 1-dB compression point (IP 1d B ) and input third-order intercept point (IIP3) are −13.2 to −6.6 and −3.6 to 3.2 dBm, respectively.