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JSSC 2021第11期Data Converters130nmOp-Amp

Bidirectional Peripheral Nerve Interface With 64 Second-Order Opamp-Less ADCs a

一款用于外周神经接口的64通道低功耗SoC，集成无运放二阶ADC和多模态信号记录功能。
130nm CMOS, 140nW/通道, 0.01mm²/通道, 27fJ/conv.step FOM
外周神经接口无运放ADCΔΣ调制器多模态记录无线供电
▸无运放二阶ΔΣ ADC设计，功耗和面积最低
▸多模态信号记录（电压和电流同时测量）
▸集成60MHz无线供电和600MHz RF数据通信
Abstract
An active probe and microstimulator SoC for inter- facing with peripheral nerves is presented. It performs 64-channel artifact-tolerant neural recordin g, cuff imbalance compensation by impedance sensing, and neurostimulation for the closed-loop operation. Each recording channel is a second-order opamp-less /Delta1/Sigma1ADC that consumes 140 nW and occupies 0.01 mm 2 area in 130 nm CMOS. The single-loop /Delta1/Sigma1architecture achieves second-order noise shaping with two passive integrators.