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JSSC 2021第12期Power Management40nm CMOS

A Low Phase Noise and High FoM Distributed-Swing-Boosting Multi-Core Oscillator Using Harmonic-Impeda nce-Expanding Technique

提出一种分布式摆动增强和谐波阻抗扩展的多核振荡器,实现低相位噪声和高品质因数。
相位噪声-138.9 dBc/Hz @1MHz偏移,FoM 195.1 dBc/Hz
低相位噪声高品质因数多核振荡器分布式摆动增强谐波阻抗扩展
创新点1:分布式耦合多核拓扑结构,通过引入多核耦合设计,有效减少芯片面积并消除模式模糊性,提升了振荡器的集成度和稳定性。
创新点2:分布式摆动增强结构,通过提升栅极摆幅和VDS的方波波形,显著降低了相位噪声,实现了高性能的振荡器设计。
创新点3:谐波阻抗扩展技术,利用双谐振响应扩展谐波附近的高阻抗频率范围,实现了宽频段的谐波整形,进一步优化了相位噪声性能。
创新点4:共模和差模谐振技术,通过利用第二和第三谐波附近的谐振,抑制了闪烁噪声的上变频,并实现了谐波整形,提升了整体性能。
Abstract
In this article, a distributed-swing-boosting and harmonic-impedance-expanding multi-core oscillator is proposed to achieve low phase noise and high figure-of-merit (FoM), simultaneously. First, a distributed-coupling multi-core topology is introduced to reduce the chip area with no mode ambiguity. Then, the distributed-swing-boosting and harmonic-impedance- expanding structure is developed to boost the gate swing and square-like waveform of V DS. The common-mode (CM) reso- nances around the second harmonic and the differential-mode (DM) resonances around the third harmonic are utilized to suppress the flicker noise up-conversion and achieve harmonic shaping. Meanwhile, the dual-resonance response expands the high-impedance frequency ranges around the harmonics, and thus, the effect of harmonic shaping can be obtained over a wide frequency range. Fabricated in a 40-nm CMOS process, the oscillator measured exhibits low phase noise and high FoM simultaneously with a compact chip size. The minimum phase noise is −138.9 dBc/Hz at the 1-MHz offset, corresponding to an FoM of 195.1 dBc/Hz. The 1/ f 3 phase noise corner is 100– 130 kHz over the 26.6% tuning range.