← 返回 JSSC 论文列表JSSC 2021第12期Data Converters0.11μm CMOSSAR ADC
Energy-Efficient CMOS Humidity Sensors Using Adaptive Range-Shift Zoom CDC and Power-Aware Floating Inverter Amplifier Array
提出一种基于自适应范围缩放CDC的能效CMOS湿度传感器,采用SAR ADC和ΔΣ调制器组合结构。
17.9aF电容分辨率,14.0位ENOB,1.01ms转换时间,1.5μW功耗,±1.5%RH精度
CMOS湿度传感器电容数字转换器自适应范围缩放能效设计SAR ADC
▸自适应范围缩放(ARS) zoom CDC结构
▸功耗感知浮动反相放大器(FIA)阵列
▸抗片外寄生和干扰设计
Abstract
This article presents an adaptive zoom-capacitance- to-digital converter (CDC)-based CMOS humidity sensor. The humidity sensor is realized by means of two differential capac- itors whose dielectrics are sensitive to humidity. The sensing capacitors are interfaced with a zoom CDC, which consists of a successive-approximation-register (SAR) analog-to-digital converter (ADC) and a 3rd-order delta–sigma modulator (M). The SAR ADC eliminates the influence of the baseline capaci- tance to reduce the input range of the M. To improve the energy efficiency of the CDC across the full input range, a power- aware floating inverter amplifier (FIA) array is proposed, which is configured based on the conversion results of the SAR logic. In addition, an adaptive range-shift (ARS) zoom CDC is proposed to: 1) resist off-chip parasitics and interference and 2) allow low redundancy and a more energy-efficient FIA-based compara- tor, thus reducing power consumption. The proposed CMOS humidity sensor is implemented in a 0.11- μm CMOS process. Measurement results show a capacitance resolution of 17.9 aF and an effective number of bits (ENOB) of 14.0 within a conversion time of 1.01 ms. The proposed humidity sensor consumes 1.5 μW of power and exhibits a 0.0094 % relative humidity (RH) resolution and a ±1.5 %RH peak-to-peak accuracy (3 σ error of 5.5 %RH) among 12 chips from 20 to 85 %RH, and it achieves a figure of merit (FoM) of 0.135 pJ ·%RH 2,w h i c hi sm o r et h a n six times better than the sta