Low-Power High-Linearity Mixer-First Receiver Using Implicit Capacitive Stacking With 3× V oltage Gain

Abstract

In this article, we present a passive mixer-first receiver front end providing a low-power integrated solution for high interference robustness in radios targeting Internet- of-Things (IoT) applications. The receiver front end employs a novel N-path filter/mixer, a linear baseband amplifier, and a step-up transformer to realize sub-6-dB NF and >20-dBm OB-IIP3 concurrently. The proposed N-path filter/mixer exploits an implicit capacitive stacking principle to achieve passive voltage gain of 3 during down-conversion and high out-of- band linearity simultaneously while using at least 2 × less total capacitance for the same RF bandwidth compared to a conven- tional switch-capacitor N-path filter. Fabricated in 22-nm com- plementary metal–oxide–semico nductor (CMOS) fully depleted silicon on insulator (FDSOI), the receiver prototype—including a 2:6 transformer—occupies only 0.2 mm 2 of active area. Operating in the frequency range of 1.8–2.8 GHz, the front end provides a 45–47-dB conversion gain and a baseband bandwidth of 2 MHz. Due to passive voltage gain in the filter/mixer and transformer, the implemented front end consumes only 1.7–2.5 mW of power to achieve <6-dB NF,∼24/60/1 dBm out-of-band IIP3/IIP2/B1dB, respectively.