An Eight-Element 140-GHz Wafer-Scale IF Beamforming Phased-Array Receiver With 64-QAM Operation in CMOS RFSOI

Abstract

This article presents a 140-GHz eight-element wafer-scale phased-array receiver based on intermediate- frequency (IF) beamforming with 5-bit phase and 4-bit gain control. The chip contains a shared local-oscillator (LO) multi- plier chain and distribution network, active combiners, LC -based combiners, digitally tuned attenuators, for a near system-on- chip solution. A differential on-chip antenna feed (on the top metal) is electromagnetically (EM) coupled to a high-efficiency patch antenna (gold) on a 100- μm-thick quartz superstrate, and placed λ/2 ( ∼140 GHz) apart in the horizontal and vertical directions. The 4 × 2-element phased-array chip with attached quartz superstrate is wire-bonded to a printed circuit board containing IF and LO ports, and scans to ±35 ◦ in the elevation plane ( E-plane). The measured channel NF is 7 dB and the array electronic gain is 27–28 dB with an RF front-end 3-dB band- width of 139–155 GHz and an IF bandwidth of 9.5–12.5 GHz. To evaluate the over-the-air performance, a communication link is demonstrated with 16-quadrature amplitude modulation (QAM) and 64-QAM waveforms, realizing up to 9–10-Gb/s data rates. To the best of our knowledge, this article presents the first CMOS wafer-scale phased-array receiver at 140 GHz with a low system noise figure and high data rate.