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A Digitally Assisted Multip lexed Neural Recording System With Dynamic Electrode Offset Cancellation via an LMS Interference-Canceling Filter
提出一种低功耗、面积高效的植入式神经记录系统，支持高密度神经植入应用。
每通道面积0.00248 mm²，功耗3.38 µW，输入参考噪声2.6 µVrms，噪声效率因子1.83
低功耗植入式神经记录高密度自适应滤波器
▸创新点1：时间分割多路复用方法记录16个神经电极（系统创新）。该方法通过时分复用技术实现16通道神经信号的高密度同步采集，显著降低了系统复杂度与功耗，同时保持高带宽（10 kHz）和低噪声（2.6 µVrms）。
▸创新点2：基于LMS算法的电极偏移消除技术（算法创新）。采用最小均方算法动态补偿多通道电极的缓慢漂移，仅需单抽头数字自适应滤波器即可实现全通道同步校准，减少模拟电路面积并提升线性度。
▸创新点3：单抽头数字自适应滤波器设计（电路创新）。该设计将传统多抽头滤波器简化为单抽头结构，在65nm CMOS工艺下实现0.00248 mm²的超小面积（68%为数字电路），功耗仅3.38 µW/通道。
▸创新点4：全集成低噪声前端架构（系统创新）。系统集成噪声优化前端，噪声效率因子（NEF）低至1.83，支持植入式应用的高能效需求，且所有功能模块均实现片上集成。
Abstract
This article presents a low-power (LP) area-efficient implantable neural recording system that supports high-density neural implant (HDNI) applications. The system uses a time- division multiple access method to record from 16-neural elec- trodes simultaneously. A least mean squares (LMSs) algorithm is used to cancel the slowly varying electrode offsets from all channels simultaneously by using a single-tap digital adaptive filter (AF). The presented technique is fabricated in 65-nm CMOS technology and achieves a per-channel area of 0.00248 mm 2; 68% of which is digital circuitry (and is thus scalable with technology). The overall system consumes 3.38 µW per channel while achieving 2.6 µV rms of input referred noise (IRN) in 10 kHz of bandwidth. The proposed system has a noise efficiency factor (NEF) of 1.83 and is fully integrated on-chip.