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A Scalable High-Current High-Accuracy Dual-Loop Four-Phase Switching LDO for Microprocessors
一款适用于高性能微处理器的1.5A高精度双环四相开关LDO,显著降低负载电容需求。
28nm CMOS, 1.5A, 70mV undershoot, 1mV/A负载调整率, 1.5mV/V线性调整率, -63dB PSR
开关LDO高电流高精度双环控制四相调制
▸创新点1:四相500MHz PWM调制技术(系统创新)。通过四相交错PWM调制实现高频操作(500MHz),显著降低输出纹波并实现固有电流平衡,解决了传统开关LDO对负载电容的依赖问题,同时提升瞬态响应速度。
▸创新点2:抗PVT变化的限流功率单元(电路创新)。采用自适应限流设计,通过实时监测工艺、电压和温度(PVT)变化动态调整功率单元电流限制,确保在1.5A负载下仍保持1mV/A的高精度负载调整率。
▸创新点3:混合快慢功率晶体管设计(电路创新)。结合快速响应晶体管与高精度慢速晶体管,优化动态性能与静态精度,实测70mV超调(1A/10ns阶跃)且轻载时静态电流仅1.8mA。
▸创新点4:双环路架构与可调主动电压定位(系统创新)。内环提供快速瞬态响应,外环保证高精度调节(1.5mV/V线调整率),AVP技术进一步优化能效(峰值效率99.27%)与PSR(-63dB@10kHz)。
Abstract
High-performance microprocessors need high cur- rent (ampere-level), high accuracy, and fast-response power supplies. Comparing to analog and digital low-dropout (LDO) regulators, the switching LDO can be a better candidate for such requirements, as it can drive large power transistor(s) fast and accurately. However, conventional switching LDOs need large load capacitance to reduce the output ripple, which restricts their applications. This article presents a 1.5-A fully-integrated switching LDO for microprocessors, with an easily scalable load capability. Here, we introduce three techniques together to relief the output capacitance requirement: 1) four-phase 500-MHz pulsewidth modulation (PWM) with inherent current balancing; 2) current-limited power cells resisting processor voltage and temperature (PVT) variations; and 3) hybrid fast-slow power transistors. Therefore, we reduce significantly the load capaci- tance to maximum load current ratio C L/IMAX when compared with the prior switching LDOs. Also, the proposed dual-loop architecture not only achieves a fast transient response, but also provides high-accuracy regulation. In addition, we design the tunable active voltage positioning (A VP). Fabricated in 28-nm CMOS, the proposed switching LDO measures a maximum 70- mV undershoot with a 1-A load current step with 10-ns edge time. The measured load regulation is 1 mV/A and the line regulation is 1.5 mV/V . Also, we obtain a good power s upply rejection (PSR) of −63 dB at 1