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JSSC 2022第6期RF & Wireless40nmPLL

An Injection-Locked Ring-Oscillator-Based Fractional-N Digital PLL Supporting BLE Frequency Modulation Yu m i n g H e, Student Member , IEEE, Johan van

提出一种基于注入锁定环形振荡器的分数N数字锁相环,支持蓝牙低能耗频率调制。
40nm CMOS, 0.09mm², 2.76mW, -44dBc分数杂散
注入锁定环形振荡器分数N数字锁相环蓝牙低能耗频率调制
随机边缘注入(REI)技术降低分数杂散
加速数字时间转换器(DTC)增益校准收敛时间
背景校准方案确保跨BLE通道稳定性能
Abstract
This article presents an injection-locked (IL) ring- oscillator-based fractional- N digital phase locked loop (DPLL) supporting Bluetooth low energy (BLE) frequency modulation with an frequency-shift keying (FSK) error between 2.4% and 3.3%. As the fractional spur cannot be suppressed by IL-DPLL, this work proposes a random edge injection (REI) to reduce the spur . This technique also speeds up the convergence time of gain calibration of the digital-to-time converter (DTC). Furthermore, the proposed background calibration schemes allow the DPLL to achieve stable performance across all BLE channels, including both integer- N and fractional- N channels. This work was fab- ricated in the 40-nm CMOS technology occupying a 0.09-mm 2 area. A fractional spur of −44 dBc and a reference spur of are achieved while consuming 2.76 mW when REI is activated. The background calibrations also ensure stable performance across BLE channels.