← 返回 JSSC 论文列表JSSC 2022第8期Digital Circuits65nmNeural Network Accelerator
A 65-nm Energy-Efficient Interframe Data Reuse Neural Network Accelerator for Vid
提出一种65nm能效优化的帧间数据重用神经网络加速器，用于视频处理。
65nm CMOS, 24.7 µJ/帧（MobileNet-slim模型）
神经网络加速器能效优化帧间数据重用混合精度稀疏数据处理
▸混合精度帧间重用架构，利用差分帧数据的低比特宽度和高稀疏性
▸卷积模式感知处理阵列，提升稀疏数据处理效率
▸首个支持帧间数据重用的硅验证CNN加速器
Abstract
An energy-efficient convolutional neural network
(CNN) accelerator is proposed for the video application. Pre-
vious works exploited the sparsity of differential (Diff) frame
activation, but the improvement is limited as many Diff-frame
data is small but non-zero. Processing of irregular sparse
data also leads to low hardware utilization. To solve these
problems, two key innovations are proposed in this article.
First, we implement a hybrid-precision inter-frame-reuse archi-
tecture which takes a