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An Auto-Zero-Stabilized V oltage Buffer With a Quiet Chopping Scheme and Constant Sub-pA
一种采用静默斩波技术和恒定输入电流的自归零稳定电压缓冲器,实现低偏移和低噪声。
偏移0.4µV, 输入电流0.8pA, 白噪声密度14nV/√Hz
自归零电压缓冲器斩波技术低噪声低偏移
▸采用高增益稳定环路周期性消除缓冲器偏移
▸通过周期性断开和自归零环路减少噪声折叠
▸优化两阶段占空比使低频噪声密度接近理论极限
Abstract
This article describes an auto-zero stabilized voltage buffer that achieves low offset and low noise with sub-pA input current. A high gain stabilization loop is used to periodically can- cel the buffer’s offset. The loop itself is periodically disconnected from the buffer and auto-zeroed, during which its bandwidth is reduced to reduce the associated noise folding. However, this also reduces its offset correction range, and so to avoid overloading, its initial offset is digitally trimmed. To break up the correlation between the residual low-frequency (LF) noise of the auto-zero and stabilization phases, the loop is periodically chopped, which significantly reduces the buffer’s LF noise. Finally, the duty-cycle of the two phases is optimized to bring the buffer’s LF noise density close to √ 2 times its white noise density (14 nV/ √ Hz), which is the fundamental limit of an AZ amplifier. The buffer also achieves a constant and low input current (0.8 pA), as well as a state-of-the-art offset (0.4 µV).