Static CMOS Physically Unclonable Function Based on 4T V oltage Divider With 0.6%–1.5% Bit Instability at 0.4–1.8 V Operation in 180 nm Massimo Vatalaro , Raffaele

Abstract

This article introduces a novel class of static and monostable CMOS physically unclonable functions (PUFs) for hardware security applications. The PUF bitcell is based on a sub- threshold four-transistor (4T) voltage divider as the core block, along with an inverter as the output stage. The 4T voltage divider consists of two series-connected and nominally identical PMOS- only two-transistor (2T) circuits. This allows inherently random bit generation assisted by mismatch while also ensuring inherent robustness against environmental variations. A 180-nm test chip was characterized to validate our solution. Measurements of the 4T bitcell core prove its capability to generate random voltages with high dispersion (i.e., close to either ground or supply voltage levels) and high stability across a wide range of environmental conditions. The statistical PUF performance was evaluated on an 8 × 32 bitcell array without applying any post-silicon stability-enhancement technique. Raw measurements reveal a bit instability of only ∼ 0.6% at golden key (GK) conditions (1.8 V and 25 ◦C), which increases up to 1.5% at 0.4 V and room temperature. When compared to prior art, our solution shows competitive performance in terms of stability, uniqueness (mean normalized inter-PUF Hamming distance (HD) of 0.493), and reproducibility (mean normalized intra-PUF HD of 0.0016), at the cost of more area-hungry design ( ∼ 7200-F 2 bitcell area).