A 16-Channel Neural Recording System-on-Chip With CHT Feature Extraction Processor in 65-nm CMOS Arda Uran , Student Member , IEEE,K e r i mT u r e, Member , IEEE, Cosimo Aprile, Alix Trouillet, Florian Fallegger , Emilie C. M. Revol , Student Member , IEEE,A z i t aE m a m i, Senior Member , IEEE, Stéphanie P. Lacour, Member , IEEE

Abstract

Next-generation invasive neural interfaces require fully implantable wireless systems that can record from a large number of channels simultaneously. However, transferring the recorded data from the implant to an external receiver emerges as a significant challenge due to the high throughput. To address this challenge, this article presents a neural recording system- on-chip that achieves high resource and wireless bandwidth efficiency by employing on-chip feature extraction. Energy–area- efficient 10-bit 20-kS/s front end amplifies and digitizes the neural signals within the local field potential (LFP) and action potential (AP) bands. The raw data from each channel are decomposed into spectral features using a compressed Hadamard transform (CHT) processor. The selection of the features to be computed is tailored through a machine learning algorithm such that the overall data rate is reduced by 80% without compromising classification performance. Moreover, the CHT feature extractor allows waveform reconstruction on the receiver side for monitoring or additional post-processing. The proposed approach was validated through in vivo and off-line experiments. Manuscript received 16 July 2021; revised 16 October 2021, 10 December 2021, and 26 January 2022; accepted 10 March 2022. Date of publication 31 March 2022; date of current version 26 August 2022. This article was approved by Associate Editor Farhana Sheikh. This work was supported in part by the European Research Council (ERC) thr