← 返回 JSSC 论文列表JSSC 2022第9期Data Converters180nmDACPLL
A 969-dB-Resolution 109- μW Second-Order Robust Closed-Loop VCO-Based Sensor Int
一种高分辨率、低功耗的VCO传感器前端,采用二阶噪声整形和闭环结构。
180nm CMOS, 109µW, 96.9dB分辨率, 0.5ms转换时间
VCO传感器二阶噪声整形数字锁相环高分辨率低功耗
▸采用改进的数字锁相环结构实现二阶噪声整形
▸闭环结构显著提高线性度
▸双测量方法增强电源和温度变化的鲁棒性
Abstract
This article presents a highly digital robust
voltage-controlled oscillator (VCO)-based front end for multi-
plexed single-ended resistive sensor readout applications. The
architecture features a modified digital phase-locked loop (DPLL)
structure that enables second-order noise shaping without any
operational transconductance amplifiers (OTAs) and a single
feedback digital-to-analog converter (DAC). The direct conver-
sion of the sensor input resistance to time-domain information
obviates the nee