An Ultra-Low Jitter Low-Power 102-GHz PLL Using a Power-Gating Injection-Locked

Abstract

This work presents an ultra-low jitter , direct W - band phase-locked loop (PLL). Using the proposed power-gating injection-locked frequency multiplier (PG-ILFM)-based phase detector (PD) that can maintain a high phase-error-detection gain even at high frequencies above 100 GHz, this W -band PLL can achieve a very low in-band phase noise. Due to this intrinsically low in-band phase noise, the bandwidth of the PLL can be extended so that it can suppress the poor phase noise of the W -band voltage