A 56-Gb/s PAM-4 Transmitter/Receiver Chipset With Nonlinear FFE for VCSEL-Based Optical Links in 40-nm CMOS

Abstract

This article presents a 56-Gb/s four-level pulse amplitude modulation (PAM-4) transmitter/receiver (TX/RX) chipset for optical link. The optical transmitter (TX) adopts a digital-to-analog converter (DAC)-based structure with a two-tap nonlinear PAM-4 feed-forward equalizer (FFE) implemented in the digital domain to compensate for the asymmetric responses from the vertical cavity surface-emitting laser (VCSEL). The 56-Gb/s PAM-4 receiver (RX) is connected to the photodiode (PD) and transimpedance amplifier (TIA) module for optical application. The interconnection loss from the RX chip to the PD+TIA module is compensated by the RX continuous-time linear equalizer (CTLE) and the one-tap decision-feedback equal- izer (DFE). The pattern-filter-based bang-bang phase detector in the RX improves the jitter performance. Both TX and RX are fabricated in the 40-nm CMOS. The VCSEL TX demonstrates a 56-Gb/s compensated PAM-4 waveform with −0.9-dBm outer optical modulation amplitude (OMA) while consuming only 97 mW of power (1.73 pJ/b). The RX achieves 10 −12 bit error rate (BER) with 0.08 UI margin under 10-dB interconnection loss while dissipating 278 mW of power (4.96 pJ/b).