← 返回 JSSC 论文列表
📄 下载 JSSC 原文 PDF
JSSC 2022第10期Other

FlashMAC A Time-Frequency Hybrid MAC Architecture With Variable Latency-Aware Sc

提出FlashMAC架构,结合时域和频域计算,支持多比特乘法,实现高能效DNN加速。
无具体数据
混合信号计算时频混合架构多比特乘法DNN加速能效优化
时频混合计算架构,无需高功耗振荡器
集成频率校准环路,增强PVT变化鲁棒性
可变延迟感知调度和权重重排序优化
Abstract
With the widespread of deep neural net- works (DNNs) in diverse applications, tiny platforms such as Internet-of-Things devices are starting to adopt DNNs. Due to their extreme energy and form factor constraints, conventional digital-only implementations of multiply-and-accumulate (MAC) acceleration faced fundamental limitations. To that end, the inves- tigation into mixed-signal computing architectures is growing rapidly. Motivated by the flash ADC, this article proposes Flash- MAC architecture