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A 158-mW 360-MHz BW 68-dB DR Continuous-Time 1-1-1 Filtering MASH ADC in 40-nm C
一款在40纳米CMOS工艺中实现的158毫瓦功耗、360MHz带宽、68dB动态范围的连续时间1-1-1滤波MASH ADC。
40nm CMOS, 1/1.1/1.8V, 5GS/s, 68dB DR, 360MHz BW
连续时间ADC多级噪声整形Gm-C积分器动态范围功耗优化
▸采用RC混合稳定DAC补偿额外环路延迟和相位偏移
▸使用延迟匹配全通输入滤波器和低通前馈滤波器抑制输入信号泄漏
▸后端阶段采用低功耗、节省面积的Gm-C积分器
Abstract
This article presents a 5-GS/s continuous-time (CT)
multi-stage noise-shaping (MASH) analog-to-digital converter
(ADC). The ADC consists of three first-order modulators with
a 3-bit quantizer/digital-to-analog converter (DAC) per stage.
An RC-hybrid stabilization DAC is used to compensate for the
excess loop delay and excess phase shift. A delay matching all-
pass input filter with a low-pass feedforward filter is employed to
suppress input signal leakage. As a result, inter-stage DACs are
waived i